1. Field of the Invention
The present invention relates to the reduction of signals of unwanted frequencies in switched mode power supplies in which an error in the selected voltage is corrected. The invention particularly but not exclusively relates to switched mode power supplies for envelope tracking applications such as may be used for radio frequency (RF) amplification.
2. Description of the Related Art
Frequency domain duplex (FDD) systems include transceivers that have a transmitter and a receiver which operate at different carrier frequencies. A simple exemplary architecture of such an FDD system is illustrated in FIG. 1. A transceiver includes a transmitter block 6 which receives an input signal on line 2 to be transmitted by an antenna 18. A receiver block 8 receives signals that are detected at the antenna 18 and delivers them on signal line 4. The output of the transmitter 6 is delivered to a duplex filter 14 on line 10. The received signal from the antenna 18 is delivered from the duplex filter 14 on a line 12 to the receiver 8. The antenna 18 is connected to the duplex filter 14 via a line 16.
In such an FDD system it is important that energy from the transmitter does not block the receiver. This blocking may occur because the duplex filter on the output of the transmitter has only limited attenuation. Any noise present at the receiver frequency on the transmitter output, due to noise from the transmitter, has the potential to cause receiver blocking.
It is an aim of the invention to provide an improved technique for reducing the noise generated by a switched mode power supply.